Storage Perspective on Domestic AI Accelerator Selection: Interface Generation and Bandwidth Matching
In the selection of domestic AI accelerators, the generation and bandwidth matching of storage interfaces are key factors affecting the efficiency of large model inference and training. Based on measured data from Mingxin FX100 on ROCm and Ascend platforms (reports R2/R9), the PCIe 3.0 interface (single-port 100Gb) reduces the first-token latency of a 480B model by 26–32% and increases throughput by 29–40% in KV cache acceleration scenarios. PCIe 4.0/5.0 interfaces (200Gb/400Gb) further optimize bandwidth utilization, but cost-effectiveness must be weighed against workload demands. This article analyzes the impact of interface generation selection on the performance of domestic GPUs (e.g., AMD MI308X, Huawei Ascend 910B) from a storage perspective, helping decision-makers avoid bandwidth bottlenecks or over-investment.
How Does Interface Generation Affect Inference Latency and Throughput?
In large model inference, KV cache hit rate is directly related to storage bandwidth. Under a 480B·TP8 long-context workload, the Mingxin FX100 (PCIe 3.0, 100Gb) reduces TTFT p50 from 10.17–35.73s to 7.53–26.35s, a reduction of 26–32% (measured, report R2). This benefits from the low-latency characteristics of the NVMe-oF protocol, but the interface generation determines the maximum bandwidth ceiling. PCIe 4.0 (FX200, 200Gb) offers double the bandwidth, increasing throughput by 40% at 16 concurrent requests (measured, report R3). PCIe 5.0 (FX300, 400Gb) further optimizes for larger clusters (e.g., TP4×2), achieving a 35–36% increase in full-system throughput (measured, report R3). For domestic accelerators like the AMD MI308X (ROCm platform), PCIe 3.0 already meets most production deployment needs, but if model parameters exceed 500B or concurrency surpasses 32 requests, the bandwidth advantages of PCIe 4.0/5.0 become more pronounced.
Key Differences in Storage Interface Selection on the Ascend Platform
On the Huawei Ascend 910B platform, the Mingxin FX100 (PCIe 3.0) achieves a 6.2–9.3× acceleration in model loading compared to the NFS baseline (measured, report R9). The Ascend platform has good native support for NVMe-oF, but interface generation affects end-to-end latency. PCIe 4.0 (FX200) can further reduce TTFT in Ascend scenarios, but measured data shows that the bandwidth utilization of the Ascend 910B's PCIe 4.0 interface is limited by driver optimization, with actual gains of about 15–20% (non-Mingxin official data, based on community feedback). For training checkpoint saving, PCIe 3.0 already achieves a 1.9× acceleration (measured, report R1), and PCIe 4.0 could theoretically increase this to 2.5×, but attention must be paid to NVMe-oF driver compatibility on the Ascend platform. It is recommended to prioritize verifying the target platform's support for the interface generation during selection, rather than blindly pursuing higher generations.
Cost-Effectiveness Trade-off: Decision Framework for PCIe 3.0 vs 4.0 vs 5.0
From a cost perspective, the fully configured reference price for the Mingxin FX100 (PCIe 3.0) is ¥371,200 (approx. ¥2,014/TB), the FX200 (PCIe 4.0) is ¥331,200 (approx. ¥1,797/TB), and the FX300 (PCIe 5.0) is ¥924,000 (approx. ¥5,014/TB). PCIe 4.0 offers better unit capacity cost, but the bandwidth requirements of the actual workload must be assessed. For inference-intensive scenarios (e.g., 480B model, 16 concurrent requests), PCIe 3.0 already covers a 29–40% throughput improvement (measured, reports R2/R3), with PCIe 4.0 providing an additional gain of about 10–15%. PCIe 5.0 is more suitable for ultra-large clusters (e.g., 64+ cards). It is recommended to adopt a "match by demand" strategy: first validate the gate metric of TTFT reduction ≥25% with PCIe 3.0 (Mingxin joint testing mode), then decide whether to upgrade generations based on measured bottlenecks.
Conclusion
In the selection of domestic AI accelerators, the storage interface generation must match the workload, platform compatibility, and cost objectives. Mingxin Technology offers the FX series from PCIe 3.0 to 5.0, supporting ROCm and Ascend platforms, with a joint testing mode to quickly validate performance metrics. Please contact us to obtain a Python-reproducible estimation model under NDA.
Key Q&A
Q: Can the PCIe 3.0 interface meet the inference acceleration requirements for a 480B model?
A: Yes. The Mingxin FX100 (PCIe 3.0) achieves a 26–32% reduction in TTFT and a 29–40% increase in throughput under a 480B·TP8 workload (measured, reports R2/R3), making it suitable for most production deployment scenarios.
Q: On the Ascend platform, how much gain does PCIe 4.0 offer over PCIe 3.0?
A: Based on community feedback, the PCIe 4.0 interface on the Ascend 910B is limited by driver optimization, with actual gains of about 15–20%. It is recommended to verify compatibility before selection.
Q: How should one choose the PCIe generation to optimize cost-effectiveness?
A: First validate the gate metric (TTFT reduction ≥25%) with PCIe 3.0, then decide whether to upgrade to PCIe 4.0/5.0 based on measured bottlenecks. PCIe 4.0 has a lower unit capacity cost (¥1,797/TB), making it suitable for medium-scale clusters.