FX100 Comprehensive LLM Inference & Training Benchmark (8× AMD MI308X)
Scope
LMCache parallel-read patch, multi-GPU KV tiering scale-out, concurrent model loading, model-switch effective TPS, training checkpoint concurrent writes (Qwen2.5-32B/7B).
Original filename: test/AISSD5000-综合性能测试报告-AMD-MI308X.pdf
Test platform (free)
8× AMD Instinct MI308X (192 GB HBM each, gfx942); 2× AMD EPYC 9654 (384 threads), ≈1.5 TB RAM; ROCm 7.2; vLLM 0.20.1+rocm721; LMCache (built from upstream mainline source, 2026-06-29). Device under test: Mingxin FX100 all-flash NVMe-oF array: 4-drive RAID0 (14 TB, XFS), RoCEv2, single 100 GbE port. Baseline: Local single NVMe drive (PCIe Gen4, 2 TB); no-external-storage re-compute.
Measured figures backed by this report (free)
These figures are not behind the paywall — they are the performance claims this site makes publicly, so anyone should be able to check them for free. What is paid for is the report itself: full method, per-level raw data, charts, screenshots and signatures.
Single GPU, concurrency 16, cold read (Qwen2.5-32B): TTFT 37.97 s → 9.30 s; bandwidth 0.98 → 5.23 GB/s (5.3×).
Provenance: Measured, R1
8-GPU 32B LoRA, 65.6 GB full-model snapshots: 178 s → 94 s; sustained write bandwidth 3.26 → 6.40 GB/s (+96%).
Provenance: Measured, R1
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